As an emitter-grounded wide-band amplifier circuit 1, generally used hitherto is that of a construction in which, as shown in FIG. 1, an input signal V.sub.in amplified through an amplification stage 2 is inputted to an NPN transistor Q1, and is generated as an output signal V.sub.out from a load resistance R1 connected to an emitter of the transistor Q1.
Another conventional emitter-grounded wide-band amplifier circuit includes a wide-band amplifier circuit 3 with a current source 4 connected, as shown in FIG. 2, instead of the resistance R1 (shown in FIG. 1), which is functional to enhance a driving power of a load capacity during the period in which the output signal V.sub.out breaks, and thus to expand further a frequency characteristic.
However, in the case of the wide-band amplifier circuits 1 and 3, a total load capacity such as capacities C.sub.1 and C.sub.2 of pins applied to the output stage, capacities of pads and the like must be driven, therefore the problem inherent therein is such that a frequency characteristic is capable of deteriorating due to an influence of a damping resistance connected to the base for prevention of oscillations by the load capacity.
Now, therefore, proposed is a wide-band amplifier circuit 6 with the output stage given in a push-pull construction so that the matter of oscillations may not particularly be taken into consideration (FIG. 3).
However, in the case of the wide-band amplifier circuit 6, since a transition frequency f.sub.T (gain being 1) of a PNP transistor Q4 connected to the transistor Q3 is generally low, a frequency characteristic cannot be expanded up to a high level.
Similarly, that with the output stage in a push-pull construction includes a wide-band amplifier circuit 8 for subjecting transistors Q5 and Q6 to a push-pull operation from inputting the input signal V.sub.in amplified through an in-phase amplifier circuit 10 and an inverse amplifier circuit 11 to the NPN transistors Q5 and Q6 constructing a single ended push-pull output stage ( FIG. 4 ).
In the case of the wide-band amplifier circuit 8, however, a phase difference of the output signal cannot be adjusted at 180.degree. for the difference in delay time between the amplifier circuit 10 and 11, therefore the frequency characteristic cannot be expanded unlimitedly, and hence it cannot be applied to a wide-band amplifier circuit operating on the input signal V.sub.in exceeding, for example, 100 [MHz].
In view of such circumstances, there is proposed a wide-band amplifier 20 as shown in FIG. 5, whereby a frequency characteristic may be expanded to a high band not less than 200 [MHz].
The wide-band amplifier circuit 20 then comprises a differential input stage 21 and two differential output stages 22 and 23 connected in parallel with the output signal thereof, and the differential input stage 21 is constructed of a pair of NPN transistors Q11 and Q12.
Here, the emitters of the transistors Q11 and Q12 of the differential input stage 21 are connected to current sources 25 and 26 leading in a constant current I.sub.O, and an input resistance R.sub.in is connected to nodes whereat the emitters and the current sources 25 and 26 are connected together.
Further, diodes D1 and D2 having a reference potential E1 given to other ends are connected to collectors of the transistors Q11 and Q12, and a anti-phase output signal V2 and an in-phase output signal V3 of the input signal V.sub.in are generated to differential output stages 22 and 23 from the nodes whereat these are connected.
On the other hand, the differential output stage 22 has a differential pair constructed of a pair of NPN transistors Q13 and Q14, and a current source 27 leading in a constant current 2I.sub.1 is connected to a common emitter of the transistors.
The load resistance R.sub.L is connected to collectors of the transistors Q13 and Q14, and the differential output stage 22 comprises generating an in-phase output signal V4 having inversed the anti-phase output signal V2 to a buffer transistor Q15.
As in the case of the differential output stage 22, the differential output stage 23 has a differential pair constructed of a pair of NPN transistors Q16 and Q17, and a current source 28 leading in an output current 2I.sub.out1 is connected to a common emitter of the transistors.
In this case, collectors of the transistors Q16 and Q17 are connected to an emitter of the buffer transistor Q15 and a collector of the transistor Q14 respectively, and the transistor Q16 constructs a low-impedance signal push-pull output stage with the buffer transistor Q15.
In this connection, a transfer function G(S.sub.1) of the wide-band amplifier circuit 20 may be expressed as: ##EQU1## by means of a cut-off frequency f.sub.c.
Thus, the buffer transistor Q15 and the transistor Q16 drive the load capacity C.sub.5 on voltage in accordance with the in-phase output signal V4, and also drive it on current in accordance with the anti-phase output signal V2 anti-phase with the in-phase output signal V4, therefore the frequency characteristic can further be expanded as compared with the case of other wide-band amplifier circuits 1, 3, 6 and 8.
As a result, the wide-band amplifier circuit 20 is capable of obtaining an output amplitude 4 [V.sub.p--p ] in a high band of 250 [MHz] or so without using a transistor particularly high in the transition frequency f.sub.T, however, it is conceived that a serviceability will further be enhanced, if a large amplitude of output signal can be generated with the frequency characteristic remaining as constant, or the frequency characteristic can be further expanded with the amplitude as constant.
Further, an integratized wide-band amplifier circuit has another problem which effects frequency deterioration.
That is, an output stage of an integrated circuit is generally constructed of an emitter follower output circuit as shown in FIGS. 1 and 2, generating an output signal V.sub.out from output pins P1 and P2.
Here, in the output stage of an integrated circuit 1 (FIG. 1), an NPN transistor Q1 is driven by an input signal V.sub.in amplified by an operational amplifier 2, and the output voltage V.sub.out generated on a load resistance R1 connected to an emitter of the transistor Q1 is outputted from the output pin P1.
In an output stage of an integrated circuit 3 (FIG. 2), the emitter of the NPN transistor Q2 is connected to a current source 4 to drive the transistor Q2 with a constant current, and output the output voltage signal V.sub.out from the output pin P2.
Meanwhile, there exists a load capacity C2 such as a pin capacity (4 to 5 pF), a pad capacity, a capacity of external parts and the like on the output stage of the integrated circuit, and since the output stage must drive the load capacity C2 with the output voltage signal V.sub.out, a frequency characteristic cannot be enhanced full to a high level.
For example, the output stage of the integrated circuit 1 and the integrated circuit 3 is constructed of an emitter follower circuit, therefore a current amplification factor h.sub.FE drops inevitably in a high frequency band. As a result, an output impedance gets high and the circuit tends to oscillate, and thus a resistance must be connected to a base of the transistors Q1 and Q2 to suppress the oscillation.
Thus in the case of the integrated circuit 1 and the integrated circuit 3, a frequency characteristic can only be enhanced to 40 to 50 [MHz] or so.
Now, therefore, it is possible to conceive of the output stage being given in a push-pull circuit configuration for driving the load capacities C1 and C2 (FIGS. 3 and 4 ).
However, in the case of the output stage of an integrated circuit 6 (FIG. 3), while the frequency characteristic can be enhanced as compared with the integrated circuit 1 and the integrated circuit 3, the frequency characteristic can only be enhanced as high, at best, as 150 [MHz] due to an influence of a low transition frequency f.sub.T of a PNP transistor Q4 constructing the push-pull circuit.
On the other hand, in the case of the output stage of an integrated circuit 8 (FIG. 4), the construction is such that the NPN transistors Q5 and Q6 are connected in series, a buffer circuit 10 and an inversion buffer circuit 11 are connected to bases of the transistors Q5 and Q6 respectively, thereby subjecting the output stage to a push-pull operation, however, the frequency characteristic cannot be enhanced satisfactorily to a high level to a difference in delay time between the buffer circuit 10 and the inversion buffer circuit 11.